CS 3710-001 Fall 2024 Computer Design Lab

ECE/CS 3710: Computer Design Lab

Fall 2024

Tuesday - Thursday 3:40 - 5pm

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General Information

• Instructor: Erik Brunvand
  • Office: MEB 3142
  • Email: Please send messages through the Canvas interface
  • Office Hours: After class or by appointment or when my office door is open

• Venue: 

  • WEB 2230 and MEB 3133 Junior Hardware Lab (JHL)
  • For lectures we will meet in the classroom WEB 2230. I expect lectures to last for the first month or so of the semester. Once we start working on the assignments, we will generally meet in JHL. We'll still have occasional lectures in the classroom so please pay attention to the course schedule. 
• TA for the course: Sean Koo
  
  • Email: sean.koo.ce@gmail.com
  • Office Hours: Mon  3:00pm-6:00pm at MEB 3133
    • • • • Wed 3:00pm-4:30pm at MEB 3143 (The door is locked, so please knock on the door to get in)
  • If the scheduled office hour doesn't work for you, please email me to set a time outside of the scheduled hour

• Textbook: No textbook is required. 
  • However, the 3700 textbook will be very helpful: "Fundamentals of Digital Logic with Verilog Design. Third Edition, c 2014. Authors: Brown and Vranesic. McGraw Hill Publishers. 

  • Your 3810 textbook will also be quite helpful: "Computer Organization and Design: The Hardware/Software Interface", by Patterson and Hennessy. Morgan Kaufmann publishers. Our 3710 instruction is neither MIPS nor RISC-V, so it doesn't matter which version of this book you used.

• Pre-requisites: ECE/CS 3700, ECE/CS3810 or equivalent classes, and Verilog.
  • You will struggle in this class if you don't remember circuits and Verilog from 3700 and computer organization from 3810
  • Here's a self-assessment that you can take to remind you of things you learned in 3700 and 3810. I encourage you to give it a try. If you can solve these problems, you're in good shape! This self-assessment does not need to be turned in and will not be graded, it's just for your own assessment. (I'll post an example solution sometime later)

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Course Objectives

This is a project-based design class in which groups of students (groups can be of size 3 to 5) design, build, and test a simple computer starting from a description of the instruction set.The idea is to use your digital design skills from 3700, and your computer architecture knowledge from 3810, and put it all together into an interesting semester-long project. You will design your project using a combination of Verilog and schematics, validate your design through simulation, and implement your design using a development board containing a Field Programmable Gate Array (FPGA). You will design every detail of your processor including instruction set design and encoding, memory organization, ALU design, finite state control, and I/O subsystems. 

Deliverables: In addition to demonstrating a functioning design, you will submit a final written report, make two presentations to the class, and do a public demo at the end of the semester. 

More details can be found on the Course Details page linked here. 

I've collected some resources into Canvas Pages

• Info about the FPGA tools and FPGA board is here
• Info about our CS/ECE 3710 instruction set architecture is here
• Some Verilog resources are linked here
• Some information and resources for writing are here

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Grading

• Individual assignments: 25%
• Group checkpoints: 15%
• Presentations (mid-semester and final): 10%
• Final Project: 50%
  • Written Documentation: 20%
  • Project Details: 30% (project meetings, project functionality, implementation, demo, etc.) 

 

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Course Schedule

Subject to change as we get into the semester... 

 

Date	Subject	Supporting Materials
Tue Aug 20 WEB 2230	Intro to 3710	Intro slides  Past 3710 projects
Thu Aug 22 WEB 2230	Verilog Review	Verilog review slides
Tue Aug 27 WEB 2230	Verilog Review continued	Verilog for Synthesis
Thu Aug 29 WEB 2230	*** Watch out - there's an afternoon football game today! *** FSM design in Verilog (e.g. TBird) Mini-MIPS review	Verilog FSM review Mini-MIPS slides
Tue Sep 3 WEB 2230	Mini-MIPS review continued
Thu Sep 5 WEB 2230	Mini-MIPS review continued
Tue Sep 10 WEB 2230	VGA overview	VGA slides
Thu Sep 12 WEB 2230	Class architecture/ISA Team forming activity	CS3710 ISA slides
Tue Sep 17	No class - Erik out of town
Thu Sep 19 Dance Building theater	Special Session: Class visit to Dance with Drones rehearsal. Meet in the Dance building auditorium.	Short talk by the choreographer and drone programmer. Then watch rehearsal as an example of human/drone interaction
Tue Sep 24 WEB 2230	Class architecture/ISA continued
Thu Sep 26 WEB 2230	Altera Cyclone V overview Intro to DE1-SoC FPGA board	Cyclone V slides
Tue Oct 1 WEB 2230	Lecture about I/O (SPI, I2C, etc.)	Slides on external IO devices and interfacing
Thu Oct 3 WEB 2230	Lecture on other peripherals (PS/2, servos, motors, TFTs, etc.)	Slides about PS/2 communication Better slides about communication, including game controllers.  Slides on servos, motors, sensors, etc.
Tue Oct 8	No Class - Fall Break
Thu Oct 10	No Class - Fall Break
Tue Oct 15 MEB 3133	Meet 1-1 with Groups in the lab - Talk about your plans for moving forward with your project.	3:40-3:55: Bit Busters 3:55-4:10: Byte Benders 4:10-4:25: Group 8 4:25-4:40: Tron-Tastic Engineers 4:40-4:55: Group 2 4:55-5:10: Group 3
Thu Oct 17 MEB 3133	Meet 1-1 with Groups in the lab - Talk about your plans for moving forward with your project.	3:40-3:55: Group 6 3:55-4:10: Silicon Wizards  4:10-4:25: The Emulators 4:25-4:40: Group 4 4:40-4:55: Group 5 4:55-5:10: Group 7
Tue Oct 22 MEB 3133	Meet 1-1 with Groups in the lab - talk about ALU/RF checkpoint, and progress towards Data Path / Memory checkpoint	Group meetings according to Oct 15 calendar
Thu Oct 24 MEB 3133	Meet 1-1 with Groups in the lab - talk about ALU/RF checkpoint, and progress towards Data Path / Memory checkpoint	Group meetings according to Oct 17 calendar
Tue Oct 29 WEB 2230	Mid-semester presentations	Group presentation order same as Oct 15
Thu Oct 31 WEB 2230	Mid-semester presentations	Group presentation order same as Oct 17
Tue Nov 5 MEB 3133	Meet 1-1 with Groups in the lab - talk about Data Path / Memory checkpoint	Group meetings according to Oct 15 calendar
Thu Nov 7 MEB 3133	Meet 1-1 with Groups in the lab - talk about Data Path / Memory checkpoint	Group meetings according to Oct 17 calendar
Tue Nov 12 MEB 3133	Meet 1-1 with Groups in the lab - talk about control FSM and instruction decoding checkpoint.	Group meetings according to Oct 15 calendar
Thu Nov 14 MEB 3133	Meet 1-1 with Groups in the lab - talk about control FSM and instruction decoding checkpoint.	Group meetings according to Oct 17 calendar
Tue Nov 19 MEB 3133	Meet 1-1 with Groups in the lab - General discussion of progress and about your plans for your demo application	Group meetings according to Oct 15 calendar
Thu Nov 21 MEB 3133	Meet 1-1 with Groups in the lab - General discussion of progress and about your plans for your demo application	Group meetings according to Oct 17 calendar
Tue Nov 26	No class - Thanksgiving Lead-In	I can meet with groups in the lab if you would like...
Thu Nov 28	No Class - Thanksgiving
Tue Dec 3 WEB 2230	Final in-class presentations	Group presentation order same as Oct 15
Thu Dec 5 WEB 2230	Final in-class presentations	Group presentation order same as Oct 17
Friday December 6	Final Demo Day! At Alumni House on campus.  Demos 9:30-11:30am  Lunch noon-1:00pm	We are coordinating with CS/ECE 4710, and will do demos in a room at the Alumni Center, followed by a reception.

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