Lab #2 - Arithmetic Circuits
- Due Feb 15, 2019 by 11:59pm
- Points 100
- Submitting a text entry box or a file upload
Rubric
Find RubricKeep in mind that 79 students have already been assessed using this rubric. Changing it will affect their evaluations.
| Criteria | Ratings | Pts | |
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4-bit CSA Demo
threshold:
pts
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pts
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16-bit CSA Simulation
threshold:
pts
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pts
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16-bit RCA Simulation
threshold:
pts
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pts
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Verilog Code
Full Adder
4-bit RCA
2-to-1 MUX
4-bit CSA
16-bit RCA
16-bit CSA
threshold:
pts
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pts
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Verilog Testbenches
Must be self-checking test-benches to get these points
Include a test-bench for each module that you write
threshold:
pts
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pts
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Report Writeup
Must include everything as stated in submission requirements of lab handout (simulation plots for each adder, area & delay stats, summary of observations).
threshold:
pts
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pts
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Total Points:
100
out of 100
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