Labs: LTspice NAND gates

The AND/NAND gate in LTspice is an odd part.  Here is the URL to a website explaining it:

https://www.electronicspoint.com/resources/going-digital.19 Links to an external site.

Note that all unused inputs have to be connected to pin 8, and pin 8 must be connected to the system gnd.

Also, you need to use the Component Attribute Editor to set the Vhigh = logic 1 voltage (5V) and the level (ref=2.5) at which an input is considered to be a 1 instead of a 0.  The power supply voltage is taken to be the same as Vhigh.

Here is a screen shot of how it can be hooked up as a 2-input NAND gate: